Device-tree at boot: parse the firmware DTB for memory size, UART/GIC/RP1 bases, model string; consolidate the two duplicated FDT parsers

Epic: #113 · Milestone: MC2 — Pi 5 bring-up

Why

Hardcoded 40-bit peripheral addresses are how Pi ports rot (Pi 4 → Pi 5 changed the base from 0xFE000000 to 0x1F_0000_0000 for RP1 and 0x10_7C00_0000 for SoC blocks). The bootloader hands us a DTB in x0 describing everything — memory, reserved-memory (VideoCore carve-out, must not be touched by the PMM), UART, GIC, PCIe/RP1, SD, HDMI, mailbox. Two FDT parsers exist, arch/arm64/devicetree.home (670) and arch/arm64/rpi/devicetree.home (914), neither compiled.

Tasks

• Keep one parser (kernel/src/arch/arm64/devicetree.home), fix it to the Home subset the aarch64 codegen supports, delete the other; unit-test it on x86 QEMU against a DTB blob embedded in the initramfs (parsers are arch-neutral, so this ships before ARM boots).
• platform/bcm2712.home: query model, /memory, /reserved-memory, compatible = arm,pl011, arm,gic-v3, brcm,bcm2712-pcie, brcm,rp1, brcm,bcm2712-hdmi, brcm,bcm2712-mbox; expose typed structs consumed by the drivers — no driver hardcodes a base.
• PMM on ARM initialises from /memory minus /reserved-memory minus kernel image and DTB.
• dtb shell command dumping the parsed tree over serial.

Acceptance

Milestones [DTB] model: Raspberry Pi 5 Model B and [PMM] Initialized with <N> MB from DTB on hardware; the same kernel reports virt correctly in QEMU.

Size: M · Depends on: #51 (rungs 2–5) · Blocks: #58, #67, #66