Parent: #478 Split from: #530 Related: #461, #480, #493
Problem
#530 replaces deep linear lookup and predictable transition hashing with collision-free persistent AVL indexes. Its functional four-lane and suppression-free TSan witnesses pass, but a dedicated shared-realm publication diagnostic shows that total transition throughput stops scaling beyond two lanes even when lanes publish beneath independent parent shapes.
The pre-implementation fixture is intentionally split into:
- partitioned base shapes: each lane publishes unique fanout edges beneath its own prepared parent shape in one shared Context;
- anti-specialization variant: different base/key layout with identical logical work and checksum;
- contended control: every lane publishes beneath one parent, preserving the serialized worst case.
Each invocation uses a fresh base-shape generation and reuses one object per lane, deleting back to the base after every unique publication. This removes per-iteration object construction while preserving real transition publication, exact own-key order, deletion, and deterministic checksums.
Scope
- Attribute 1/2/4/8-lane time to Shape transition locks, Context arena allocation, object property locks, GC, and Thread lifecycle using shared attribution.
- Remove the causal independent-parent bottleneck with bounded Context-owned storage and an explicit synchronization design.
- Consider per-thread arena tranches, batched immutable-node allocation, or optimistic persistent-root publication only when exact profiles justify them.
- Preserve same-name convergence, collision-independent exact keys, stable slots, delete/re-add undo, OOM atomicity, moving GC, and Context teardown.
- Keep the same-parent contended row visible; do not describe intentional serialization as scalable.
No-workaround rules
- No GIL, hidden serialization outside the measured lock, prepublishing scored keys, reusing a result cache, reducing logical work at higher lane counts, unbounded per-thread reserves, benchmark-name/source recognition, or excluding the 4/8-lane rows.
- Do not trade exact same-name convergence or OOM rollback for duplicate visible shapes.
Acceptance
- Benchmark source, base/variant/contended identities, jobs, checksums, warmup, and timed boundary are committed before the runtime fix.
- Clean 1/2/4/8-lane order-balanced evidence reports transitions/second, instructions/transition, lock contention/wait, allocation bytes, GC, peak/retained RSS, and dispersion.
- Partitioned total publication throughput is monotonic across 1/2/4/8 lanes and the anti-specialization variant agrees; every row retains identical per-lane work.
- The contended row remains bounded and exact, with wait/serialization attributed rather than hidden.
- Same-name convergence, disjoint fanout, deep delete/re-add, allocation-failure rollback, 32 MiB bounded heap, moving/parallel GC, threadfuzz, and suppression-free TSan pass.
- Shallow classes, mixed application, dense Array, and #530 deep lookup rows do not regress materially; retained memory remains bounded and published.
Security boundary
Property names, fanout, and thread schedules are attacker-controlled. The fix must improve independent publication without reintroducing predictable collision behavior, races, half-published roots, or unbounded thread-local retention.